For the last couple of months; I’ve been working on a redesign of the willams printer kit for my Star Trek: The Next Generation pinball. Much of the work as been in the Complex Programmable Logic Device (CPLD) which is in 256BGA form. Why a CPLD? Long term I intend to replace the Intel 8251A USART (which is becoming increasingly difficult to find and expensive) with a “soft IP” core. The only pseudo-free 8251A core I could find was by ALTERA. They allow free use of that IP; but only as long as you put it in an Altera device. I’m ok with that; but to be honest, I really do not like the company. My first tech-support request was “refused” because I wouldn’t provide them with a company or university name. I’m a hobbyist for crying out loud; support your damn products or bite me. If I had any other choice I’d go with another CPLD/FPGA company for this reason alone. But I digress…
This is a 1mm pitch BGA – needed it because the whole design requires logic blocks which only come in bga form factors. 🙁
I was forced to go to a 4 layer PCB to get the smaller 13mil drill sizes for “escape routing” the bga signals. I designed the pinout of the BGA to mainly use the outside peripheral pins of the bga. Pinouts were made to make for easier routing to U3 (Ti’s 74LVCH16T245), U2 (Ti’s 74LVC4245A), and U6 (FTDI’s FT232RQ) chips.
The design used the Ti 245s to translate between the MaxV’s VCCIO of 3.3V and the WPC/USARTs system voltage of 5Vs. Linear 1.8V and 3.3V LDOs from Ti drive the MaxV VCCINT (1.8V) and VCCIO (3.3V) pins. 3.3V also drives the other support chips; the UART->USB (FT232RQ) and the RS232 charge pump (U5/MAX3242UI). Logic in the CPLD controls “enables” to the MAX3243 from the USB chip; so that if a laptop/computer is plugged into the usb (J710U); the rs232 port at J710 is “off”.
This leaves a question; Why have the i8251A device onboard. This is a debug feature. Given I’ve never done a CPLD or FPGA design before; I’m thinking it may not work “right out of the shoot”… so I’m providing myself with a short term verification feature; where I can prove a real 8251 works … but there is a bug in the IP core (or my implementation of it). Long term; my goal is to de-pop U1 and U2 to reduce bom costs once the design is proven functional.
The FabA schematics and FPGA high level schematic is posted in the PDF below:
Williams Serial Printer Kit (pre-debug)
I retain all rights to the implementation and schematics.
The top layer board will look something like this:
When installing in the pinball machine; one would disconnect the main cpu ribbon cable and plug it into J701B. The connect a short “jumper” ribbon cable from the cpu board to this board via J710A.
I got to be honest; the bga on the board is very scary. $20 a piece… and BGAs aren’t really known for their ease in the DIY workshop. But; it’ll be fun to see how pcb assembly goes.
I hope to order the PCB shortly… then be “waiting” for the batch pcb service to pool with others. I may quote with PCBFabExpress.com as they seem to have very reasonably priced 4 layer boards with a quick (compared to batchpcb, 5 day turn).
Next step after ordering boards and BOM for assembly; is to get back to the visual pinmame source code in order to begin “simulating” the printer kit from a software prospective. Long term; I want to test the ROM hacks to dump the high scores via serial port and the Serial kit. Once I’ve tested the roms in pinmame; then I can commit them to the real machine. I did have some success compiling pinmame from source; but for some reason I get an assertion about filetypes when running the compiled images.
I’d also like a benchtop WMS debug system… thought about using a P-Roc – but not sure if close enough to the original WMS board to be compatible with the WMS printer kit.